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Your search returned 35 records. Click on the hyperlinks to view further details of Titles.. |
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Magazine Name : Ieee Transactions On Neural Networks
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Year : 2003 Volume number : 14 Issue: 05 |
Fast Triggeringin High-Energy Physics Experiment Using Hardware Neural Networks
(Article)
Subject:
Hardware Neural Networks
,
High Energy Physics
Author:
Bruce
Denby
Patrick
Garda
page:
1010
-
1027
A Digital Hardware Pulse-Mode Neuron With Piecewise Linear Activation Function
(Article)
Subject:
Activation Functions
,
Backpropagation
,
Algorithm
Author:
H.
Hikawa
page:
1028
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1037
Fpga Implementation Of Ica Algorithm For Blind Signal Separation And Adaptive Noise Canceling
(Article)
Subject:
Adaptive Noise
Author:
Chang-Min
Kim
page:
1038
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1046
Implementation Of Adaptive Critic-Based Neurocontrollers For Turbogenerators In A Multimachine Power System
(Article)
Subject:
Adaptive Critics
,
Hardware Implementation
Author:
Ganesh K.
Venayagamoorthy
R. G
Harley
page:
1047
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1064
Dsp-Based Hierarchical Neural Network Modulation Signal Classification
(Article)
Subject:
Digital Signal Processor
,
Implementation
,
Hierarchical
Author:
Namjin
Kim
Nasser
Kehtarnavaz
page:
1065
-
1070
Digital Implementation Of Hierarachical Vector Quantization
(Article)
Subject:
Digital Very Large Scale Integraion (Vlsi) Circuits
,
Vector Quantization
Author:
Massimiliano
Bracco
S.
Ridella
page:
1072
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1084
Ip Core Implementation Of A Self-Organizing Neural Network
(Article)
Subject:
Neural Network
Author:
D. C.
Hendry
Andrew A.
Duncan
page:
1085
-
1096
A Compact 3-D Vlsi Classifier Using Bagging Threshold Nework Ensembles
(Article)
Subject:
Bagging Decision Trees
,
Threshold-Based System
Author:
Amine
Bermak
page:
1097
-
1109
Implementation Of A New Neurochip Using Stochastic Logic
(Article)
Subject:
Boltzmann Machine
,
Large-Scale Integration
Author:
Shigeo
Sato
Shunsuke
Akimoto
page:
1122
-
1127
Design And Implementation Of A Random Neural Network Routing Engine
(Article)
Subject:
Network Processors
,
Neural Network
Author:
Taskin
Kocak
Jude
Seeber
page:
1128
-
1143
An Image Representation Algorithm Compatible With Neural-Associative-Processor-Based Hardware Recognition Systems
(Article)
Subject:
Biomedical Image Processing
,
Image Recognition
Author:
Masakazu
Yagi
Tadashi
Shibata
page:
1144
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1161
Implementation Of An Rbf Neural Network On Embedded Systems: Real -Time Face Tracking And Identify Verification
(Article)
Subject:
Digital Signal Processing
,
Face Localization
Author:
Fan
Yang
Michel
Pandavoine
page:
1162
-
1175
A New Wide Range Euclidean Distance Circuit For Neural Network Hardware Implementation
(Article)
Subject:
Analog Very Large Scale Integration (Vlsi)
,
Euclidean Distane Properties
Author:
Anand
Gopalan
A. H
Titus
page:
1176
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1186
Analog Implementation Of Ann With Inherent Quadratic Nonlinearity Of The Synapses
(Article)
Subject:
Analog Implementation
,
Artificial Neural Networks
,
Nonlinear Synapse
Author:
Momchil
Milev
Marin
Hristov
page:
1187
-
1200
Analog Recurrnt Decision Circuit With High Signal-Voltage Symmetry And Delay-Time Equality To Improve Continous -Time Convergence Performance
(Article)
Subject:
Associative Memory
,
Convergence
,
Saturation Maps
Author:
A
Hirose
Kazuhiko
Nakazawa
page:
1201
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1206
Compact Low-Power Calibration Mini-Dacs For Neural Arrays With Programmable Weights
(Article)
Subject:
Analog Design
,
Calibration
,
Current Splitters
Author:
Bernabe Linares
Barranco
Teresa Serrano
Gotarredona
page:
1207
-
1216
Vlsi Implementations Of Threshold Logic-A Comprehensive Survey
(Article)
Subject:
Integrated Circuit
,
Neural-Network Models
Author:
Valeriu
Beiu
M. J
Avedillo
page:
1217
-
1243
Real-Time Reconfigurable Linear Threshold Elements Implemented In Floating-Gate Cmos
(Article)
Subject:
Cmos
,
Fguvmos
,
Linear Threshold
Author:
Snorre
Anuet
Yngvar
Berg
page:
1244
-
1256
Analog Soft-Pattern-Matching Classifier Using Floating-Gate Mos Technology
(Article)
Subject:
Analog Very Large Scale Integration (Vlsi)
,
Low Power
Author:
T
Yamasaki
Tadashi
Shibata
page:
1257
-
1265
A Comparative Study Of Access Topologies For Chip-Level Address-Event Communication Channels
(Article)
Subject:
Accent Topologies
,
Address Look Up
Author:
Eugenio
Culurciello
Andreas G
Andreou
page:
1266
-
1277
Scene Segmentation Using Neuromophic Oscillatory Networks
(Article)
Subject:
Legion
,
Low Power
Author:
Jordi
Cosp
Jordi
Madrenas
page:
1278
-
1296
A Vlsi Recurrent Network Of Integraed-And-Fire Neurons Connected By Plastic Synapses With Long-Term Memory
(Article)
Subject:
Integrate-And-Fire Neurons
,
Learning Systems
Author:
Davide
Badoni
page:
1297
-
1307
A Subthreshold Mos Neuron Circuit Based On The Volterra System
(Article)
Subject:
Cmos
,
Cmos Analog Integreted Circuit
,
Integrated And-Fire Neurons
Author:
Tetsuya
Asai
Yusuke
Kanazawa
page:
1308
-
1312
Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip For Early Vision
(Article)
Subject:
Cellular Neural Networks
,
Machine Vision
,
Neural Networks Hardware
Author:
Ricardo Carmona
Galan
Jinenez
Garrido
page:
1313
-
1336
Log-Domain Implementation Of Complex Dynamics Reaction-Diffusion Neural Networks
(Article)
Subject:
Analog Circuits
,
Analog Very Large Scale Integration (Vlsi)
Author:
Teresa Serrano
Gotarredona
Bernabe Linares
Barranco
page:
1337
-
1355
An Anlog Cmos Central Pattern Generator For Interlimb Coordination Quadruped Locomotion
(Article)
Subject:
Analog Cmos
,
Central Pattern Generator
Author:
Kazuki
Nakada
Tetsuya
Asai
page:
1356
-
1365
0.8 Um Cmos Implementation Of Weighted-Order Statistic Image Based On Cellular Neural Network Architecture
(Article)
Subject:
Application Specific Integrated Circuit (Asic)
,
Cellular Neural Networks
Author:
Jacek
Kowalski
page:
1366
-
1374
Neuron-Fuzzy Chip To Handle Complex Tasks With Analog Performance
(Article)
Subject:
Fuzzy Control
,
Fuzzy Hardware
Author:
Rafael De Jesus
Navas-Gonzalez
page:
1375
-
1392
Neuron-Synapse Ic Chip-Set For Large-Scale Chaotic Neural Networks
(Article)
Subject:
Chaotic Neural Network
,
Mixed Analog-Digital Integrated Circuits
Author:
Yoshihiko
Horio
Kazuyuki
Aihara
page:
1393
-
1404
An Analog Vlsi Chip Emulating Sutained And Respones Channels Of The Vertebrate Retina
(Article)
Subject:
Silicon Retina
,
Real Time Processing
Author:
Seiji
Kameda
Tetsuya
Yagi
page:
1405
-
analog a
Analog And Digital Fpga Implementation Of Brin For Optimization Problems
(Article)
Subject:
Analog Circuits
,
Connectionist Network
,
Field Programmable Gate Array
Author:
H.S.
Ng
K.P.
Lam
page:
1413
-
1425
Kerneltron: Support Vetcor"Machine" In Silicon
(Article)
Subject:
Analog Array Processors
,
Analog-To-Digital
Author:
Roman
Genov
Cert
Cauwenberghs
page:
1426
-
1434
Synaptic Plasticity In Spiking Neural Networks (Sp2inn) A System Uapproach
(Article)
Subject:
Digital Accelerator
,
Integrate-And-Five-Neuron Model
Author:
Nasser
Mehrtash
Dietmar
Jung
page:
980
-
992
Mapping Ogf The Lateral Flow Field In Typical Subchannels Of A Support Grid With Valyes
(Article)
Subject:
Typical Subchannels
Author:
Heather L.
Mcclusky
Mary V.
Holloway
page:
987
-
996
A Digital Architecture For Support Vector Machines: Theory , Algorithm, And Fpga Implementation
(Article)
Subject:
Digital Neuroprocessors
,
Field Programmable Gate Array
,
Quantization
Author:
D.
Anguita
A
Boni
page:
993
-
1009
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